The present invention especially relates to technology which is applicable to the manufacture of a semiconductor device which has a power MISFET (Metal Insulator Semiconductor Field Effect Transistor).
For example, in a semiconductor device which has a vertical type MOSFET (Metal Oxide Semiconductor Field Effect Transistor), there is technology which can improve the isolation voltage of this type of MOSFET, in which a gate electrode is formed in the inside of a groove formed in the surface of a semiconductor substrate, and an interlayer insulation film is formed on the semiconductor substrate under the gate electrode. A contact hole, which reaches the gate electrode, is formed in the interlayer insulation film. The inside of the contact hole is filled with an electric conductor plug, which connects to the gate electrode electrically, and wiring formed on the interlayer insulation film is electrically connected to the gate electrode via the electric conductor plug.
[Patent Reference 1] Japanese Unexamined Patent Publication No. 2002-368221